Sat. Nov 16th, 2024

The Finnish startup promises to speed up existing processors by 100 times

Finnish startup promises to speed up existing processors by 100 times

The company Flow Computing  states that the proposed technology of “parallel processors” compatible with all modern programs and applications.

Finnish company Flow Computing has announced the development of technology capable of increasing the performance of computer processors available on the market up to 100 times. The startup offers to integrate parallel processing cores (PPUs) into existing central processing units (CPUs) to significantly increase their power.

Company representatives describe the PPU as a separate unit that integrates with the CPU on a single silicon chip. The module does not require a significant change in the processor configuration and, according to the developers, “can be configured to meet the specific requirements of various usage scenarios in configurations from 4 to 256 cores”.

Unlike the traditional approach where manufacturers put multiple identical CPU cores into a device, Flow Computing offers a combination of standard CPU cores with a large number of PPU cores, which the company says increases performance for the same chip size.

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< p>PPU accelerates calculations when the task is “parallelizable”, but a traditional CPU is unable to take advantage of this, and transferring the load to the GPU will be too costly.

Computational tasks, the developers explain, can be roughly divided into two categories: sequential, where each new step depends on the result of the previous one, and parallel, which can be performed independently. One architecture is difficult to optimize for both types of tasks. So the company's idea is to have individual blocks handle different problems.

When we have a consistent workload, the CPU will handle it. And when it comes to parallel tasks, the CPU will assign it to the PPU. So we will get the best results from both components.

Marty Forsell, director and co-founder of Flow Computing

The developers say that they took into account when designing the new architecture the latency of access to memory&rsquo solved the problem with the synchronization of components during parallel calculations and implemented fast communications between PPU components. The technology is at an early stage of development, but according to company representatives, they have developed a test sample that confirmed the increase in processor performance predicted in emulations.

More details about the technology are reported by the company in a White Paper .

Natasha Kumar

By Natasha Kumar

Natasha Kumar has been a reporter on the news desk since 2018. Before that she wrote about young adolescence and family dynamics for Styles and was the legal affairs correspondent for the Metro desk. Before joining The Times Hub, Natasha Kumar worked as a staff writer at the Village Voice and a freelancer for Newsday, The Wall Street Journal, GQ and Mirabella. To get in touch, contact me through my natasha@thetimeshub.in 1-800-268-7116

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